The present invention relates to a semiconductor device and a method of controlling the semiconductor device, and to a semiconductor device and a method of controlling the semiconductor device which are suitable, for example, for carrying out the self-diagnosis of a clock monitoring circuit without increasing the circuit-scale.
For example, a semiconductor device mounted on a vehicle is required to operate normally in order to ensure safety, and related technologies are disclosed in Patent Document 1.
The semiconductor device disclosed in U.S. Pat. No. 1 comprises oscillator and oscillation abnormality detector. The oscillation abnormality detector specifies the frequency of the clock based on the count value obtained by measuring the frequency of the clock outputted from the oscillator. When the frequency is out of the predetermined frequency range, the oscillation abnormality detector outputs an abnormal oscillation signal. This allows the semiconductor device to determine whether the oscillator is operating normally.
However, the configuration disclosed in Patent Document 1 does not have the function to determine whether or not the oscillation abnormality detector is abnormal. Therefore, if the oscillation abnormality detector is abnormal, it is impossible to determine whether or not the oscillator is operating normally.
A solution to such problem is disclosed in Patent Document 2. The pulse period measuring device disclosed in Patent Document 2 includes at least an internal clock generating circuit, a free-run counter, a substitute clock generating circuit, a memory, a verification free-run counter, and an arithmetic unit.
First, before the start of measurement, the pulse period measuring device supplies a substitute clock generated by the substitute clock generating circuit to the free-run counter instead of the internal clock. The pulse period measuring device detects a failure of the free-run counter by comparing a count value of the substitute clock by the free-run counter with an integrated value of the substitute clock sequentially stored in the memory.
During the measurement period, the pulse period measuring device supplies the internal clock generated by the internal clock generating circuit to each of the free-run counter and the verification free-run counter. The pulse period measuring device detects a failure of the free-run counter by comparing the count value of the internal clock by the free-run counter with the count value of the internal clock by the verification free-run counter.